Memory Concepts

Memristor

The memristor was proposed in 1971 by Prof. Leon Chua as the fourth passive circuit element alongside the well known resistor, inductor and capacitor. The memristor is a two terminal device with a behavior similar to that of an ohmic resistor. However, the value of the resistance depends on the current or the electrical flux history of the device. If no voltage is applied or no current flows, the actual resistance is conserved. Thus, it is a resistor with memory. Its unique behavior, which can’t be emulated by any combination of the other three passive circuit elements, makes the memristor interesting for many emerging applications, such as memory devices, switches in reconfigurable electronics or synaptic connections in artificial neural networks. In the BMBF project (Multifunktionale Speicher), we focus on the electrical characterization and comparison of different resistive memory types which are developed together with our project partners. The concepts include spin transfer torque memory (FZ Dresden) and resistive switching in organic materials (IAPP TU Dresden). Another candidate is the ion migration based resistive switching in metal oxides which is explored within a DFG project (HANSEL). The memristor is a highly promising candidate for the realization of dense synaptic connections in artificial neural networks due to its attractive possibilities for nano-scale integration.

Charge trapping memory

One of the fields of research at NaMLab is the analysis of structures for non-volatile semiconductor memories. The EU project “Gossamer,” running within the EU FP7 framework, investigates memory devices with trap-based memory layers for the next generations. This technology is the most promising candidate to replace today’s dominant floating gate structures in NAND flash memory devices. The research activities concentrate, on the one hand, on the modeling of the electrical characteristics of memory cells and, on the other hand, on the electrical characterization of single cells. In order to meet the project’s overall goal it is necessary to integrate new materials into the layer stacks of the memory cells. Aluminum oxide, which shows higher relative dielectric constant, is used instead of SiO₂ as a possible blocking dielectric. Furthermore, it will be evaluated whether the introduction of metal gate electrodes has a positive effect on the electrical characteristics. NaMLab is developing physical models which describe the working principals of charge trapping memory cells. The memory cell relevant reliability parameters, such as the energy distribution of the traps, are under investigation in addition to the effect the materials have on the reliability.

Fig. 1: TEM picture along a NAND string of memory cells with 48 nm wide charge trap memory cells.

Fig. 2: Detailed view of a memory cell. The layers below the dark metal gate electrode form the memory cell.

Fig. 3: Trap density distribution dependence on the trap energy for three different layer stacks and at several different temperatures for one stack.

Fig 4: Temperature acceleration for a stack with SiO₂ (red) andAl₂O₃ (black) blocking dielectrics.